NTA UGC NET/JRF Exam, August -2024 (Electronic Science)

Total Questions: 100

61. Identify the block numbered from I to V in the following diagram:

(a) Current source                    (b) Integrator
(c) Buffer amplifier                  (d) Differentiator
(e) Schmitt Trigger

Correct Answer: D. (a), (e), (c), (b), (d)
Solution:Referring to the standard internal arrangement of an NE 566 VCO and matching each labeled block to its function:
1. Block I is the current source (a).
2. Block II is the Schmitt trigger (e).
3. Block III is the buffer amplifier (c).
4. Block IV is the integrator (b).
5. Block V is the differentiator (d).
Hence the correct mapping I-(a), II-(e), III- (c), IV-(b), V-(d) corresponds to option D.

62. The Vₜₕ Zₜₕ and Iₛ𝔠 values for the circuit given below are given as:

Correct Answer: C. (c), (d) and (e) only

63. Hardware descriptive language (HDL)

(a) Describe logic diagrams and complex digital circuits C. ΠΙ IV I II D. Π ΙΠΠ 1 IV 61. Identify the block numbered from I to V in the following diagram:
(b) Describes behaviour of analog circuits using simulation techniques
(c) Two HDL supported by IEEE are VHDL and Verilog HDL
(d) Both Verilog and VHDL are based on 'C' Programming

Correct Answer: B. (a) and (c) only
Solution:

(a) HDLs are indeed used to describe logic diagrams and complex digital circuits.
(c) Two HDLS supported by IEEE are VHDL and Verilog.
(b) Concerns analog modeling, which is not the principal purpose of digital HDLS.
(d) VHDL is based on Ada (not C), and although Verilog is superficially C-like, it is not literally "based on C."
Thus, only statements (a) and (c) are correct, giving option B.

64. Match the List-I with List-II.

Choose the correct answer from the options given below:

(a)(b)(c)(d)
A.IIVIIIII
B.IIIIIVII
C.IIIIIIIV
D.IVIIIIII
Correct Answer: B.
Solution:

Using standard Fourier-transform properties:
Hence the mapping (a) → III, (b)I, (c) → IV, (d) → II matches option B.

65. Match the List-I with List-II. Identify the correct combinations.

List-IList-II
(a) Ion-implantationI. HRP-206
(b) LithographyII. Ohmic Contact
(c) MetallizationIII. TAB
(d) PackagingIV. Nuclear Stopping

Choose the correct answer from the options given below:

(a)(b)(c)(d)
A.IIIVIIII
B.IVIIIIII
C.IVIIIIII
D.IIIIIIVI
Correct Answer: B.
Solution:(a) Ion-implantation → nuclear stopping (IV),
(b) Lithography → HRP-206 photoresist (I),
(c) Metallization → ohmic contact (II),
(d) Packaging → TAB (tape-automated bonding) (III).
Hence, (a) → IV, (b) → I, (c) → II (d) → III which is option B.

66. The most important requirement of an effective metallization scheme in VLSI is that metal must adhere to the silicon in the window and to the oxide that defines the window. In this respect, which of the following metals in unlikely to be used directly on SiO₂?

Correct Answer: D. W
Solution:

For an effective metallization scheme, the metal layer must strongly adhere both to the silicon window and to the surrounding oxide. Tungsten (W) generally requires an additional barrier or adhesion layer (like TiN) before deposition on SiO₂. Without such an intermediate layer, direct adhesion of tungsten to SiO₂ is poor. Hence option D is correct.

67. In crystal growth, the doping concentration in the crystal Cₛ is given by:

where
Kₒ= equilibrium segregation coefficient
Cₒ = initial doping concentration in the melt
M = initial weight
M = Weight of the grown crystal
As crystal growth progresses, the composition initially at KₒCₒwill increase continually for:

Correct Answer: A. Kₒ < 1

68. Match the List-I with List-II.

List-I (Interrupt)List-II (Address (HEX))
(a) IE0I. 0003
(b) IE1II. 000B
(c) TF0III. 0013
(d) TF1IV. 001B

Choose the correct answer from the options given below:

(a)(b)(c)(d)
A.IIIIIIIV
B.IIIIIIIV
C.IIIIIIIV
D.IIVIIIII
Correct Answer: C.
Solution:

(8051 interrupt vectors):
(a) IE0 (Ext. Int 0) → 0003ʜ (I)
(b) IE1 (Ext. Int 1) → 0013ʜ (III)
(c) TFO (Timer0 ovf.) → 000Bʜ (I)
(d) TF1 (Timer1 ovf.) → 001Bʜ (IV)
So, (a) → I, (b) → III, (c) → II, (d) → IV, which matches option C.

69. Identify I, II and III in the block diagram of phase lock loop.

(a) Phase Detector
(b) Voltage controlled oscillator
(c) Low Pass Filter

Correct Answer: B. (a), (c), (b)
Solution:

A standard phase-locked loop arranges the blocks as:
1. Phase Detector (Block I),
2. Low Pass Filter (Block II),
3. Voltage-Controlled Oscillator (Block III).
Hence, the correct correspondence is (a), (c), (b).

70. For the stable system shown below

Its velocity error constant and steady state error for unit ramp input respectively will be:

Correct Answer: C. 2, ½